After the processing of a semiconductor wafer has been completed, the resulting integrated circuit (IC) chips or dice must be separated and packaged in such a way that they can be connected to external circuitry. There are many known packaging techniques. Most involve mounting the die on a leadframe, connecting the die pads to the leadframe by wire-bonding or otherwise, and then encapsulating the die and wire bonds in a plastic capsule, with the leadframe left protruding from the capsule. The encapsulation is often done by injection-molding. The leadframe is then trimmed to remove the tie bars that hold it together, and the leads are bent in such a way that the package can be mounted on a flat surface, typically a printed circuit board (PCB).
This is generally an expensive, time-consuming process, and the resulting semiconductor package is considerably larger than the die itself, using up an undue amount of scarce xe2x80x9creal estatexe2x80x9d on the PCB. In addition, wire bonds are fragile and introduce a considerable resistance between the die pads and the leads of the package.
The problems are particularly difficult when the device to be packaged is a xe2x80x9cverticalxe2x80x9d device, having terminals on opposite faces of the die. For example, a power MOSFET typically has its source and gate terminals on the front side of the die and its drain terminal on the back side of the die. Similarly, a vertical diode has its anode terminal on one face of the die and its cathode terminal on the opposite face of the die. Bipolar transistors, junction field effect transistors (JFETs), and various types of integrated circuits (ICs) can also be fabricated in a xe2x80x9cverticalxe2x80x9d configuration.
Accordingly, there is a need for a process which is simpler and less expensive than existing processes and which produces a package that is essentially the same size as the die. There is a particular need for such a process and package that can be used with semiconductor dice having terminals on both their front and back sides.
The process of fabricating a semiconductor device package in accordance with this invention begins with a semiconductor wafer having a front side and a back side and comprising a plurality of dice separated by scribe lines. Each die comprises a semiconductor device. A surface of the front side of each die comprises a passivation layer and at least one connection pad in electrical contact with a terminal of the semiconductor device. The back side of each die may also be in electrical contact with a terminal of the semiconductor device.
The process comprises the following steps: attaching a conductive substrate to a back side of the wafer; cutting through the wafer along a scribe line to form a first cut, the first cut exposing the conductive substrate and a side edge of a die, a kerf of the first cut having a first width W1; forming a metal layer which extends from the portion of the conductive substrate exposed by the first cut, along the side edge of the die, and onto at least a portion of the passivation layer; cutting through the conductive substrate along a line that corresponds to the scribe line to form a second cut, a kerf of the second cut having a second width W2 that is smaller than the first width Wl such that at least a portion of the metal layer remains on the side edge of the die and forms a part of a conductive path between the conductive substrate and a location on the front side of the die.
The process may also include forming at least one additional metal layer in electrical contact with the at least one connection pad. Forming the metal layer may include depositing several sublayers.
Form the metal layer may comprise, for example, depositing a metal sublayer on the front side of the die, the side edge of the dice and the exposed portion of the conductive substrate; depositing a mask layer; patterning the mask layer; removing a portion of the mask layer so as form an opening that exposes a first portion of the metal sublayer, a remaining portion of the mask layer covering a second portion of the metal sublayer, the second portion of the metal sublayer being in contact with the conductive substrate and the side edge of the die; removing the first portion of the metal sublayer; and removing the remaining portion of the mask layer.
This invention also includes a process for making an electrical connection between a first side of a semiconductor die and a location on a second side of the semiconductor die, the process commencing while the die is a part of a semiconductor wafer. The process comprises attaching a conductive substrate to the first side of the wafer; cutting through the semiconductor wafer from the second side of the wafer to expose a part of the conductive substrate; forming a metal layer extending laterally from the location on the second side of the die along an edge of the die to the exposed part of the conductive substrate; and cutting through the conductive substrate while leaving intact a region of contact between the metal layer and the conductive substrate.
According to another aspect, this invention includes a package for a semiconductor device comprising: a die containing a semiconductor device, a front side of the die comprising a passivation layer and a connection pad, the connection pad being in electrical contact with the semiconductor device; a conductive plate attached to a back side of the die, the conductive plate extending beyond a side edge of the die to form a protruding portion of the conductive plate; and a metal layer extending from the protruding portion of the conductive plate, along the side edge of the die and onto the passivation layer, the metal layer being electrically insulated from the connection pad.
According to yet another aspect, this invention also includes a semiconductor structure comprising a conductive substrate; a plurality of semiconductor dice attached to the substrate, rows of the dice being separated from each other by a plurality of parallel trenches, a passivation layer on a front side of each die; and a metal layer lining the bottoms and walls of the trenches and extending onto the passivation layer
Semiconductor packages according to this invention do not require an epoxy capsule or bond wires; the substrate attached to the die serves to protect the die and act as a heat sink for the die; the packages are very small (e.g., 50% the size of molded packages) and thin; they provide a very low on-resistance for the semiconductor device, particularly if the wafer is ground thinner; they are economical to produce, since they require no molds or lead frames; and they can be used for a wide variety of semiconductor devices such as diodes, MOSFETs, JFETs, bipolar transistors and various types of integrated circuit chips.